- Main responsibilities:
- Exercise various aspects of the verification flow
- Develop verification environment
- Write test cases for functional verification and code coverage
- Debug failures in design and verification environment
- Main requirments:
- Familiarity with HDLs and scripting languages such as Perl/Python
- Working experience in developing HVL based test environments
- Working experience in developing, and implementing test plans.
- Basic knowledge of one or more Industry standard simulators and debugging tools
- Good written and oral communication skills
- Demonstrated good data-backed debug and problem-solving skills
- BA/MA in Electrical/Computer Engineering or Computer Science.
- Good conceptual understanding of digital and mixed signal design